3D Grid Generation for Semiconductor Devices Using a Fully Flexible Refinement Approach
Abstract
We present a new algorithm for the generation of 3-dimensional (3-D) grids for the simulation of semiconductor devices. The fitting of the device geometry and the required mesh density is obtained by partitioning the elements at an optimal point at each refinement step. This allows the fitting of more general 3-D device geometries and the reduction of grid points in comparison with previous grid generators.
Type
Publication
Simulation of Semiconductor Devices and Processes
Nancy Hitschfeld Kahler
+Lab founder | Full Professor Universidad de Chile
Full Professor at the Department of Computer Science, University of Chile. Her main research interests include geometric modeling, geometric meshes, and parallel algorithms (GPU computing), focused in computational science, and engineering applications.